TCL命令可以用两种方式执行,一种是在dc_shell中交互地执行;另一种是以批处理模式执行。
dc_shell>echo “Running my.tcl”
dc_shell>source –echo –verbose my.tcl
使用tee命令可以产生log文件,便于发现和察看错误和警告。
物集是DC对标准的Tcl的扩展。
部分有用的get_*和all_*命令:
get_cells #产生单元的物集 get_clocks #产生时钟的物集 get_designs #产生设计的物集 get_libs #产生库的物集 get_nets #产生连线的物集 get_pins #产生引脚的物集 get_ports #产生端口的物集 all_clocks #产生所有时钟的物集 all_designs #产生所有设计的物集 all_inputs #产生所有输入的物集 all_outputs #产生所有输出的物集 all_registers #产生所有寄存器的物集
物集有一些特别的存取命令:
sizeof_collection $foo,查看尺寸 query_objects $foo,列出物体进行查看
可以使用help *collection*来查年与物集有关的命令。
我们可使用“filter_collection”命令在物集中找出我们感兴趣的物体。
filter_collection [get_cells *] “ref_name=AN*”命令找出设计中库单元参考名字以“AN”开头的所有单元。 get_cells –filter “ref_name=mx*’命令找出设计中库单元参考名字以“mx”开头的所以单元。执行命令后,DC将显示类似如下的信息。 filter_collection [get_cells *] “is_mapped!=true”找出所有未映射(unmapped)的单元。 get_cells * -filter “don’t_touch==ture”找出所以附加了”dont_touch”属性的单元。 set fastcclks [get_clocks * -filter “period<10”]找出所有周期小于10的时钟
filter_collection产生新的物集,如果没有表达式相匹配的物体,产生空的字符串。
查看DC定义的所有属性,用下面的命令:
list_attributes –application
list_attributes –application –class clock,可以得到如下的输出结果:
**************************************** Report : attribute definition -application Design : Version: G-2012.06-SP2 Date : Tue Sep 15 18:42:02 2015 **************************************** Attributes: a - application-defined r - read-only u - user-defined Attribute name Class Type Attributes -------------------------------------------------------------------------------- add_clock clock boolean a clock_fall_transition clock float a clock_min_fall_transition clock float a clock_min_rise_transition clock float a clock_rise_transition clock float a clock_specific_buffer_for_cts_boundary_cell clock string a clock_specific_buffer_for_cts_buffer_sizing_only clock string a clock_specific_buffer_for_cts_delay_insert_only clock string a clock_specificbuffer_for_cts_synthesis clock string a ct_has_useful_skew_opts clock string a ct_minus_adjust_bound_pct clock float a ct_plus_adjust_bound_pct clock float a ct_positive_slack_margin clock float a ct_tns_effort clock string a ct_wns_effort clock string a ctdn_area_recovery clock boolean a ctdn_drc_fixing clock boolean a ctdn_drc_fixing_default clock boolean a ctdn_dummy_load_insertion clock boolean a ctdn_enable_multicorner_optimization clock string a ctdn_gate_relocation clock boolean a ctdn_gate_sizing clock boolean a ctdn_multi_corner_insert clock string a ctdn_multi_corner_skew clock string a ctdn_preserve_level clock boolean a ctdn_relax_insertion clock boolean a ctdn_route_balancing clock boolean a ctdn_split_leaf_level_clusters clock float a ctdn_split_second_level_clusters clock float a ctdn_split_unbalanced_clusters clock boolean a disable_latch_transparency clock boolean a divide_spec_mode clock boolean a dont_touch_network clock boolean a dont_touch_network_no_propagate clock boolean a duty_cycle clock float a edge_spec_mode clock boolean a factor clock integer a fall_delay clock float a fall_min_delay clock float a fix_hold clock boolean a fpga_generated_clock clock boolean a full_name clock string a gated_clock_control_high clock boolean a gated_clock_control_low clock boolean a gated_clock_hold clock float a gated_clock_setup clock float a gated_fall_clock_hold clock float a gated_fall_clock_setup clock float a gated_rise_clock_hold clock float a gated_rise_clock_setup clock float a hcm_cell_activity_factor clock float a,r hcm_clock_delay_threshold clock float a,r hcm_max_first_level_rc_delay_cstr clock float a,r hcm_max_level_rc_delay_cstr clock string a,r hcm_max_level_wire_cap_cstr clock string a,r hcm_max_rc_delay_cstr clock float a,r hcm_max_total_level_rc_delay_cstr clock string a,r hcm_max_total_rc_delay_cstr clock float a,r hold_fall_false clock boolean a hold_fall_multiplier clock integer a hold_fall_start clock boolean a hold_rise_false clock boolean a hold_rise_multiplier clock integer a hold_rise_start clock boolean a hold_uncertainty clock float u hold_uncertainty clock float a invert clock boolean a is_generated clock boolean a is_generated clock boolean u master_clock_name clock string a max_capacitance clock float a max_capacitance_clock_path_attr clock float a max_fall_delay clock float a max_rise_delay clock float a max_time_borrow clock float a max_transition clock float a max_transition_clock_path_attr clock float a min_fall_delay clock float a min_pulse_width_high clock float a min_pulse_width_low clock float a min_rise_delay clock float a minus_uncertainty clock float a multiply_spec_mode clock boolean a name clock string a object_class clock string a period clock float a plus_uncertainty clock float a propagated_clock clock boolean a rise_delay clock float a rise_min_delay clock float a setup_fall_false clock boolean a setup_fall_multiplier clock integer a setup_fall_start clock boolean a setup_rise_false clock boolean a setup_rise_multiplier clock integer a setup_rise_start clock boolean a setup_uncertainty clock float u setup_uncertainty clock float a source_early_fall_delay clock float a source_early_fall_min_delay clock float a source_early_rise_delay clock float a source_early_rise_min_delay clock float a source_fall_delay clock float a source_fall_min_delay clock float a source_late_fall_delay clock float a source_late_fall_min_delay clock float a source_late_rise_delay clock float a source_late_rise_min_delay clock float a source_rise_delay clock float a source_rise_min_delay clock float a waveform clock string u waveform clock string a -------------------------------------------------------------------------------- 1
如果要得到某一属性的值,可用下面的命令:
get_attribute [get_clocks SYS_CLK] period
我们也可以使用report_attribute命令报告cell net pin port instance design的属性以及它们相应的值。
DC-Tcl中,序列(List)是存储数据的结构,物集(collections)是用于存取数据库(DB)中的数据。
未经允许不得转载:TacuLee » Design Compiler中的Tcl使用