LLVM 18 will be released. As usual, I maintain lld/ELF and have addedsome notes to https://github.com/llvm/llvm-project/blob/release/18.x/lld/docs/ReleaseNotes.rst.Here I will elaborate on some changes.
--fat-lto-objects
option is added to support LLVMFatLTO. Without --fat-lto-objects
, LLD will link LLVMFatLTO objects using the relocatable object file.(D146778 <https://reviews.llvm.org/D146778>
_)-Bsymbolic-non-weak
is added to directly bind non-weakdefinitions.(D158322 <https://reviews.llvm.org/D158322>
_)--lto-validate-all-vtables-have-type-infos
, whichcomplements --lto-whole-program-visibility
, is added todisable unsafe whole-program devirtualization.--lto-known-safe-vtables=<glob>
can be used to markknown-safe vtable symbols.(D155659 <https://reviews.llvm.org/D155659>
_)--save-temps --lto-emit-asm
now derives ELF/asm filenames from bitcode file names.ld.lld --save-temps a.o d/b.o -o out
will create ELFrelocatable files out.lto.a.o
/d/out.lto.b.o
instead of out1.lto.o
/out2.lto.o
. (#78835)--no-allow-shlib-undefined
now reports errors for DSOreferencing non-exported definitions. (#70769)#57618 <https://github.com/llvm/llvm-project/issues/57618>
_)cdsort
algorithm, better than the previoushfsort
algorithm.(D152840 <https://reviews.llvm.org/D152840>
_)a = DEFINED(a) ? a : 0;
are nowhandled. (#65866)OVERLAY
now supports optional start address and LMA (#77272)/DISCARD/
section now lead to an error. (#69295)D152921 <https://reviews.llvm.org/D152921>
_)R_AARCH64_GOTPCREL32
is now supported. (#72584)R_LARCH_PCREL20_S2
/R_LARCH_ADD6
/R_LARCH_CALL36
and extreme code model relocations are now supported.--emit-relocs
is now supported for RISC-V linkerrelaxation.(D159082 <https://reviews.llvm.org/D159082>
_)R_RISCV_GOT32_PCREL
is now supported. (#72587)R_RISCV_SET_ULEB128
/R_RISCV_SUB_ULEB128
relocations are now supported. (#72610) (#77261)Although a substantial feature, the s390x port benefited from UlrichWeigand's meticulously prepared patch, complete with comprehensive testsfrom the outset. While I typically provide extensive feedback for suchlarge additions, the patch's exceptional quality minimized the number ofcomment rounds needed in this instance. I truly appreciate Ulrich takingthe time to reply to my remarks onthe s390x ABI. His guidance was instrumental.
The RISC-V port has received a few new relocations for.uleb128
label differences and TLSDESC. I'm glad I madethese assembler and linker changes in time, allowing LoongArchdevelopers to port the code for LoongArch. LoongArch borrows manydesigns from RISC-V. If they were to implement these features first, I'dprobably have to spend more time on code reviews, and the outcome wouldbe less rewarding since I wouldn't be the original patch author.
To the best of my knowledge, there is no performance-specificchange.